E Specman assertion language VHDL (ModelSIM, VSS, QuickVHDL) Verilog (ModelSIM) Schematic capture (Mentor, View Logic, Orcad, Daisy) Logic simulation Synthesis Analog simulation
PCI & PCI-X AGP, 2X & 4X USB Ethernet (TCP/IP) ISA/EISA PCMCIA interface Futurebus+ CUSTOM
80x86 680x0 80960 PowerPC
TTL CMOS BiCMOS ECL
CMOS GATE ARRAY CMOS STANDARD CELL
FPGA CPLD
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